Frequency Analysis of 32-bit Modular Divider Based on Extended GCD Algorithm for Different FPGA chips

Qasem Abu Al-Hiaja; Abdullah AlShuaibi; Ahmad Al Badawi

doi:10.24297/ijct.v17i1.6992

Authors

Qasem Abu Al-Hiaja Department of Electrical Engineering, King Faisal University, Al-Ahsa, 31982, Saudi Arabia
Abdullah AlShuaibi Materials Science and Engineering Department, Cornell University, Kimball Hall, ithaca, 14850 NY
Ahmad Al Badawi Department of Electrical and Computer Engineering, National University of Singapore, 119077 Singapore

DOI:

https://doi.org/10.24297/ijct.v17i1.6992

Keywords:

Modular Arithmetic, Extended Euclidian's GCD, Field Programmable Gate Array (FPGA), Hardware Synthesize, Coprime numbers, Public Key Cryptography.

Abstract

Modular inversion with large integers and modulus is a fundamental operation in many public-key cryptosystems. Extended Euclidean algorithm (XGCD) is an extension of Euclidean algorithm (GCD) used to compute the modular multiplicative inverse of two coprime numbers. In this paper, we propose a Frequency Analysis study of 32-bit modular divider based on extended-GCD algorithm targeting different chips of field-programmable gate array (FPGA). The experimental results showed that the design recorded the best performance results when implemented using Kintex7 (xc7k70t-2-fbg676) FPGA kit with a minimum delay period of 50.63 ns and maximum operating frequency of 19.5 MHz. Therefore, the proposed work can be embedded with many FPGA based cryptographic applications.

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