VANCEA, A.; CIACA, M.; AVORNICULUI, M. Loop Structures Optimization and Reordering for Efficient Parallel Processing. INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY, [S. l.], v. 15, n. 1, p. 6379–6393, 2015. DOI: 10.24297/ijct.v15i1.1710. Disponível em: https://rajpub.com/index.php/ijct/article/view/1710. Acesso em: 22 nov. 2024.