Design of Phase Shift Control For Transmit/ Receive Module of ST Radar

The paper mainly focuses on the beam forming and its analysis for planar phasedarray antenna, which is being developed as part of the ST Radar. The beam steering is done electronically by controlling the phase of the T/R module in such a way that the phase difference between each module is equal and it corresponds to the steering angle. The relative phase shift of each T/R module for a specified beam position is worked out using MATLAB and implemented using 6bit digital phase shifter. The analytical results are practically demonstrated using the STM32F4xx kit of STMicroelectronics. Theoretical values of the elemental phase for each antenna element in the array, are calculated for various positions of the beam (θ & φ). The 6-bit phase shifter results in 5.625 0 phase resolution. In the second part of the work, the calculation of the element phase with 6-bit digital phase shifter is discussed. The calculated values of the elemental phase are truncated to an integral multiple of 5.625 0 .


INTRODUCTION
SAMEER is developing ST Radar for weather studies. The frequency range of this radar is  MHz with 5MHz bandwidth. The proposed radar shall have an antenna array with 576 elements. Each antenna element will have its own T/R module with a built-in T/R controller. The radar beam can be placed anywhere in azimuth from 0 0 to 360 0 and ±15 0 in elevation thus forming a cone both in elevation and azimuth angles in steps of 3 0 .Each TRM generates 400W RF peak power, which results in 230kW peak power radiated from the radar. The radar is expected to cover a height range upto 20 kms. For this purpose, an electronic beam steering concept is used.
To steer the beam in the desired direction, the relative phase of the individual elements in the array is adjusted such that the beam points in the desired direction [1][2][3][4]. To achieve this, a 6-bit digital phase shifter is included in the T/R module. The use of 6-bit phase shifter results in 5.625 0 resolution. By controlling the phase-shifter insertion phase, the desired phase difference between successive antenna elements is maintained, which results in the beam being pointed in the specific direction. The main objective of the beam steering system is to calculate the elemental phase of the individual elements.

BASICS OF BEAM POSITIONING
In an antenna array, the beam position is defined by two co-ordinates : elevation angle () & azimuth angle (). For a rectangular lattice the mn th element is located at Xm = m*dx and Y = n*dy from where dx and dy are the inter-element distance in X and Y direction respectively. The distribution of the antenna elements in the antenna array is shown in Fig.1 below:

Fig.1 Distribution of Antenna Elements.
To steer the beam in any direction (θ, ) in space, the phase data for each element is calculated as

Element Phase = m* + n* (1)
Where x is the phase gradient in X-direction and y is the phase gradient in Y -direction.

δx = (2π/λ)* d x * Sin(θ)*Cos(φ) (2)
Where d x is the inter-element spacing= 0.7λ which is shown in Fig.1 and,values of θ, φ are taken in degrees, therefore, 2π is where, d y is the inter-element spacing = 0.7λ y = 360*0.7*Sin() * Sin(φ) For a specific beam position, the values of δx and δy are constant for all the elements. Thus the relative phase shift depends only on the location (m, n) of the element in the array.

CALCULATION OF ELEMENT PHASE
Antenna elements in the array are arranged in a square grid configuration with approximately circular aperture. The inter element spacing is 0.7λ, which results in 28 antenna elements along the diameter. The Fig. 2 below shows the placement of antenna elements in the array. J a n u a r y 1 7 , 2 0 1 4   Table .1 The calculated element phase output produced using Excel Sheet for  = 12 0 &  = 357 0 with m and n combinations. J a n u a r y 1 7 , 2 0 1 4

Estimation of Absolute Phase Error
The Phase shift control is achieved using a 6-bit digital phase shifter. The resolution of this phase shifter is 5.625 0 . Due to the quantization error of the digital phase shifter, the actual phase shift generated by each element may not be exactly same as the calculated phase shift. The difference between calculated element phase and actual element phase is estimated. This difference is the phase error caused due to quantization.For calculating the absolute phase error, the calculated elemental phase is rounded off to 5.625 0 to get actual phase shift generated by the digital phase shifter. The calculated results are generated in the Excel sheets using MATLAB. The formula to calculate the absolute error is given as

DEMONSTRATION OF THE ELEMENTAL PHASE
The verification of calculated element phase was carried out using the test setup shown in Fig.3 below:

Fig. 3 Block Diagram of Elemental Phase Demonstration.
The set-up to check the element phase includes a 6-bit digital phase shifter is used in the TRM to generate the desired element phase. To demonstrate the element phase, this same 6-bit phase-shifter is used. The insertion phase of this phase-shifter is measured by giving phase-shifter control word to generate 0 0 phase shift. The measured insertion phase of the phase-shifter is compensated by generating appropriate control word and taking this control word as an offset for all element phase calculations. This ensures that calculated element phase and measured element phase match closely. The test set-up includes a Vector Network Analyser (VNA), which is used to measure the phase difference between input and output of the phase shifter. This phase difference gives the element phase for set values of m, n,  & . The element phase is calculated using STM32F407VGT6 evaluation board [5] [6] [7]. The values of  &  are kept fixed and m & n are changed manually. The MCU STM32F407VGT6 calculates the element phase by reading m & n from one port and generates corresponding control word for phase shifter. The calculated element phase value is sent over USART to the PC through RS232 driver. The values of element phase calculated by MCU and measured at VNA are compared. The programming of STM32F4xx MCU was done in C using KEIL compiler (evaluation version) [8].The relative phase shift of the element is obtained by setting the appropriate control bits of the digital phase shifter.
For demonstration purpose this kit is being selected. The STM32F4xx is the ARM processor based on the ARMv7-M architecture [9] [10] [11] . Certain values of element phase (in each quadrant) were verified using the test set-up. All these elemental phase results are practically demonstrated. This results show significant change in the phase shift of the phase shifter. This is a floating point processor which is basically used to calculate all the element phase calculations. This is the major advantage of this MCU. Floating-point calculations can be accelerated using a Floating-point unit (FPU) integrated in the processor [12]. On an FPU less processor, all these operations are done by software through the C compiler library and are not visible to the programmer; but the performances are very low. On a processor having an FPU, all of the operations are entirely done by hardware in a single cycle, for most of the instructions. The C compiler does not use its own floatingpoint library but directly generates FPU native instructions. When implementing a mathematical algorithm on a microprocessor having an FPU, the programmer does not have to choose between performance and development time. The FPU brings reliability allowing us to use directly any generated code through a high level tool, such as matlab or scilab. J a n u a r y 1 7 , 2 0 1 4 The 6-bit digital phase shifter will result into 64 positions i. e. 2 6 = 64 positions. Therefore the resolution of the 6bit phase shifter is 360 0 / 64 = 5.625 0 . The LSB resolution is 5.625 0 and MSB weight is 180 0 . The 6-bit phase shifter provides a continuous beam steering of the main beam both in elevation and in azimuth angles in steps 3 0 . The MCU calculates the control word for digital phase shifter from the calculated value of element phase. When the control word corresponding to an element phase is output of STM32F407VGT6, the phase shift is changed, which is displayed on the VNA. The screen shot of Fig.4 shows three trace windows (TR1, TR2, TR3). The TR1 window is the return loss (S11) of the phaseshifter which is 24.07dB measured at 212MHz. The TR2 window is the insertion loss (S21) which is 5.68dB, measured from 100-212MHz and linear throughout the frequency range. The TR3 window shows the output of the calculated element phase for  = 15 0 and  = 270 0 is expected to be 33.75 0 and the actual measurement output on the VNA is 33.92 0 . Fig. 4 output of the element phase on the Vector Network Analyser.
The Fig. 5 shows the actual set-up to demonstrate the element phase. The set -up comprises of the STM32F407VGT6 Discovery Evaluation Board, two 8 -bit switches and USART for serial communication with PC and Vector Network Analyser (VNA).